A semiconductor memory device such as a DRAM (Dynamic Random Access Memory) includes a sense amplifier per paired bit lines so as to amplify a weak signal read from each memory cell. The sense amplifier needs to raise a potential of one of the paired bit lines to a higher write potential (high level) and to reduce that of the other bit line to a lower write potential (low level). Due to this, the sense amplifier is structured so that the higher write potential and the lower write potential are supplied to the sense amplifier when the sense amplifier is activated.
In recent years, sense amplifiers are often configured to operate based on an overdrive mechanism to raise the potential of one of the paired bit lines to the higher write potential at higher speed (see Japanese Patent Application Laid-open Nos. 2005-222580, 2001-35164, and H10-269771). The overdrive mechanism is to supply an overdrive potential higher than the higher write potential to the sense amplifier. By structuring the sense amplifier as an overdriven sense amplifier, a sensing operation can be accelerated.
However, if the sense amplifier is structured as the overdriven sense amplifier, noise tends to be superimposed on the other bit line the potential of which is reduced to the lower write potential. Namely, as shown in FIG. 9, if it is assumed that one of physically adjacent bit lines Bi and Bi+1 is driven to the higher write potential (high level) and that the other bit line is driven to the lower write potential (low level), the potential of the bit line Bi+1 adjacent to the bit line Bi is raised via a capacity C1 between the bit lines Bi and Bi+1 when the potential of the bit line Bi is raised to the overdrive potential. Beside the capacity C1, a capacity C2 via many unselected word lines Wx, a capacity C3 via a substrate and the like are present between the bit lines Bi and Bi+1. Due to this, if a signal amount of the bit line Bi+1 is insufficient, data inversion possibly occurs to the bit line Bi+1.
To solve such a problem, a driving capability of a transistor for overdriving the sense amplifier (“overdrive transistor”) is designed to be low. In this case, however, the effect of structuring the sense amplifier as the overdriven sense amplifier is greatly reduced, with the result that the sensing operation cannot be sufficiently accelerated.
As described above, if the sense amplifier is structured as the overdriven sense amplifier, it is advantageously possible to accelerate the sensing operation. On the other hand, the data of the other bit line is disadvantageously inverted.